← 返回 JSSC 论文列表JSSC 2011第12期Clocking & PLLs45nmPLL
DECEMBER 2011 VOLUME 46 NUMBER 12 IJSCBC ISSN 0018-9200 SPECIAL ISSUE ON THE 201
2011年IEEE JSSC特刊聚焦固态电路会议,涵盖多项模拟电路创新设计。
560fs集成抖动,4.5mW功耗
分数N数字PLL电源噪声消除LED驱动Class-D放大器电流反馈仪表放大器
▸Bang-Bang相位检测器的2.9–4.0-GHz分数N数字PLL
▸PVT不敏感的电源噪声消除技术
▸无滤波器的Class-D音频放大器设计
Abstract
Solid-State Circuits Conference .........................
................................................................... J . Savoj, Y. Manoli, H. Darabi, Y. Palaskas, and M. Moyal 2739
ANALOG PAPERS
A 2.9–4.0-GHz Fractional-N Digital PLL With Bang-Bang Phase Detector and 560-
Integrated Jitter at 4.5-mW
Po wer ................... ................... D. T asca, M. Zanuso, G. Marzin, S. Levantino, C. Samori, and A. L. Lacaita 2745
A 0.4-to-3 GHz Digital PLL With PVT Insensitive Supply Noise