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JSSC 2012第1期Memory

Highly Reliable and Low Power SSD Using Asymmetric Coding and Stripe Bitline-Pat

提出一种高可靠低功耗SSD方案,通过非对称编码减少NAND闪存错误,条纹位线模式消除算法降低写入功耗。
NAND闪存错误率降低90%
固态硬盘NAND闪存非对称编码低功耗数据可靠性
非对称编码减少90%存储单元错误
条纹位线模式消除算法(SPEA)降低写入功耗
可与其他高可靠低功耗技术结合使用
Abstract
Highly reliable and low power solid-state drive (SSD) is proposed. Through the analysis based on measured error rate in the SSDs with NAND flash memories, the memory cell error shows the asymmetric characteristic in multilevel cell (MLC) NAND flash memories. The proposed asymmetric coding increases the number of “1” s or “0” s of the programming data to reduce the data re- tention error. The numbers o f the memory cells in the higher states are reduced. The memory cell error is reduced by 90% with