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JSSC 2012第3期Clocking & PLLs0.13μmClock Generation

A Pulse Shaping Technique for Spur Suppression in Injection-Locked Synthesizers Mehran M. Izad , Student Member , IEEE

提出一种脉冲整形技术,有效抑制注入锁定合成器的杂散信号。
0.13μm CMOS, 1.2V, 4.488GHz, 122dBc/Hz@1MHz, 4.7ns切换时间
脉冲整形注入锁定合成器杂散抑制WiMedia UWBCMOS
脉冲整形技术减少注入脉冲中的不良谐波
深入讨论电路非理想性的影响
在WiMedia UWB首波段组中验证技术有效性
Abstract
Frequency synthesizers based on sub-harmonic in- jection-locked oscillators can reduce power and area effectively. However, they suffer from unwan t e ds i d e - b a n d sc a u s e db yu n - desirable harmonics in the injection pulse. This paper presents a pulse shaping technique that reduces these undesirable harmonics in the injection pulse and produces low-spur synthesized output. The robustness of the proposed technique and the impact of circuit non-idealities are also discussed in depth. A test chip tailored to the first band group of WiMedia UWB is fabricated in 0.13- m CMOS technology to verify the effectiveness of this technique. Experimental results show that the proposed pulse shaping atten- uates the spurs by 22 dB and suppresses them below 47 dBc. The prototype achieves a switching time of less than 4.7 ns and phase noise of 122 dBc/Hz@1 MHz offset at 4.488 GHz. The chip occupies an active area of 0.15 mm and draws only 18 mA from a 1.2-V supply.