JSSC 2012第4期Power Management45nm SOI CMOSCharge Pump

Dual-Loop System of Distributed Microregulators With High DC Accuracy Load Respo

双环路分布式微调节器系统在45nm SOI CMOS工艺中实现高DC精度和快速负载响应。

45nm SOI CMOS, 500ps负载响应时间, 10mV DC负载调节, 28mVpp输出噪声

双环路架构分布式微调节器DC精度负载响应输出纹波

▸双环路架构实现快速负载响应

▸异步比较器与局部电荷泵调谐提高DC精度

▸混合快速/慢速通栅控制和pMOS强度校准减少输出纹波

Abstract

A dual-loop architecture employs eight distributed microregulators (UREGs) to achieve load response times below 500 ps in 45-nm SOI CMOS. The trip point of an asynchronous comparator inside each UREG is tuned for high DC accuracy with a local charge pump, which receives UP/DOWN currents from a slow outer feedback loop. The feedback through the charge pumps also ensures balanced load sharing among the UREGs. Two techniques are introduced to red uce the output ripple generated by switching the pMO