← 返回 JSSC 论文列表JSSC 2012第5期RF & WirelessDelta-Sigma ADCPLL
The Design of All-Digital Polar Transmitter Based on ADPLL and Phase Synchronize
提出了一种基于ADPLL和相位同步的全数字极性发射机设计
1-V电源, 58 mW功耗, 6.8 dBm输出功率
全数字极性发射机ADPLLΔΣ调制器相位同步D类功率放大器
▸采用全数字PLL(ADPLL)进行相位调制
▸使用1位低通ΔΣ调制器进行包络调制
▸采用H桥级D类功率放大器(PA)进行差分信号传输
Abstract
An improved architecture of polar transmitter (TX)
is presented. The proposed architecture is digitally-intensive and
mainly composed of an all-digital PLL (ADPLL) for phase modula-
tion, a 1-bit low-pass delta sigma ΔΣ modulator for envelop modu-
lation, and a H-bridge class-D power amplifier (PA) for differential
signaling. The ΔΣ modulator is clocked using the phase modulated
RF carrier to ensure phase synchronization between the amplitude
and phase path, and to guarantee the PA is switching a