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Associative Memory for Nearest-Hamming-Distance Search Based on Frequency Mapping Hans Jürgen Mattausch , Senior Member , IEEE, Wataru Imafuku, Akio Kawabata, Tania Ansari, Masahiro Y asuda
基于频率映射的最近汉明距离搜索关联存储器架构,具有低功耗和高鲁棒性。
64个参考模式,每个256位,0.7V至1.8V供电,功耗36.5mW@1.8V,307µW@0.7V
关联存储器汉明距离频率映射环形振荡器低功耗
▸利用汉明距离到频率空间的映射操作
▸通过可编程环形振荡器实现快速并行搜索
▸设计参数可调以补偿制造相关变化
Abstract
The developed associative-memory architecture uti- lizes a mapping operation of the Hamming distances into frequency space with ring oscillators programmable in discrete frequency steps. As a result fast word-parallel search of the nearest Ham- ming distance with low power consumption is obtained. Addition- ally, high robustness against fabri cation-related variations of the MOSFET characteristics is achievable by design because the size of the frequency steps is a freely selectable design parameter which can be adjusted to compensate the variation magnitude. A quanti- tative analysis of within-die variation effects on the reliability of the associative-memory archite cture is presented and guidelines for the choice of the design parameters at a given magnitude of the variation effects are derived. Feasibility and performance of this associative-memory architecture are experimentally evaluated with a VLSI design in 180 nm CMOS technology containing 64 ref - erence patterns each consisting of 256 bits. The fabricated chip is correctly operating down to low supply voltages (Vdd) of 0.7 V. The power dissipation is less than 36.5 mW and 307 µW at sup ply volt- ages of 1.8 V (nominal supply) and 0 .7 V , respectively. Measured search reliability is found to be in agreement with measured vari- ations of the important design parameters and expe ctations from the variation analysis. In comparison to previously reported dig- ital associative-memory designs, the achieved power dissipat