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A Fully Digital Delay Line Based GHz Range Multimode Transmitter Front-End in 65
提出一种基于全数字延迟线的GHz范围多模式发射机前端，支持946 MHz至2.4 GHz连续载波频率。
65nm CMOS, 946 MHz-2.4 GHz, EVM 1.90%-6.08%
全数字发射机极性调制延迟线GHz范围多模式
▸采用异步延迟线实现10 ps时间分辨率
▸支持连续载波频率和采样频率范围
▸结合PWM和PM实现全数字极性上变频
Abstract
This paper presents a fully digital polar up-converter
for wireless transmission in the GHz range. The system is designed
to drive two class-E power ampli fiers (PAs) with a power com-
biner. It uses baseband pulse width modulation (PWM) for the
amplitude modulation (AM), whereas phase modulation (PM) is
implemented by shifting the RF carrier in time. Both the PWM
and the PM are implemented using asynchronous delay lines which
allow time resolutions down to 10 ps without the need for any ref-
ere