← 返回 JSSC 论文列表JSSC 2012第7期Analog Circuits0.13μmOp-Amp
Analysis and Design of a High Speed Continuous-time Modulator Using the Assisted Opamp Technique Ankesh Jain, Muthusubramaniam V enkatesan
采用辅助运放技术设计的高速连续时间调制器,实现1 GS/s采样率和15.625 MHz带宽内的10位分辨率。
0.13μm CMOS, 67 dB动态范围, 4 mW功耗
连续时间调制器辅助运放技术高速ADC时序偏差单比特操作
▸辅助运放技术提升线性度和速度
▸针对单比特操作优化的第一积分器设计
▸对反馈和辅助DAC电流时序偏差的鲁棒性分析
Abstract
We apply the “assisted opamp technique” to the design of a 1 GS/s single-bit continuous-time modulator (CTDSM) that achieves 10 bit resolution in 15.625 MHz band- width. The enhanced linearity and speed of th e first integrator of the modulator, necessitated by sin gle-bit operation, are obtained in a power ef ficient manner using opam p assistance. However, timing-skew between the feedback and assi stant DAC currents can be a potential problem at high speeds. We analyze and give intuition for the effects of timing mismatch in such CTDSMs, and show that opamp assistance is quite robust to timing errors. Measurement results from an implementation in a 0.13 mC M O S process show that the modulator achieves a dynamic range of 67 dB in 15.625 MHz bandwidth while c onsuming 4 mW.