← 返回 JSSC 论文列表JSSC 2012第9期RF & Wireless40nmOptical I/O
10-Gbps 53-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS Frankie Y
40nm CMOS工艺下10Gbps光收发器电路设计,功耗低至53mW。
10Gbps, 53mW, 40nm CMOS, 2-V swing, 4-kΩ TIA gain
光收发器CMOS硅光子低功耗10Gbps
▸使用低寄生微焊球技术连接硅光子器件
▸静态热调谐器补偿光学器件工艺变化
▸采用交织时钟敏感放大器进行电压切片
Abstract
We describe transmitter a nd receiver circuits for a
10-Gbps single-ended optical link in a 40-nm CMOS technology.
The circuits are bonded using low -parasitic micro-solder bumps
to silicon photonic devices on a 130-nm SOI platform. The trans-
mitter drives oval resonant ring modulators with a 2-V swing and
employs static thermal tuners to compensate for optical device
process variations. The receiver is based on a transimpedance
amplifier (TIA) with 4-k
gain and designed for an input power
of 15