A 2T1C Embedded DRAM Macro With No Boosted Supplies Featuring a 7T SRAM Based Re

Abstract

A truly logic-compatible gain cell eDRAM macro with no boosted supplies is presented. A 2T1C gain cell implemented only with regular thin oxide devices consists of an asymmetric 2T cell and a coupling PMOS capacitor. The PMOS capaci tor ensures proper operation even without a b oosted supply by utilizing a ben- eficial coupling for read and a preferential boosting for write. A re- pair scheme based on a single-ended 7T SRAM has fe atures such as a local differential write and shared control with