← 返回 JSSC 论文列表JSSC 2012第10期RF & Wireless0.18µm
A New Approach to Low-Power and Low-Latency Wake-Up Receiver System for Wireless
提出一种新型低功耗低延迟唤醒接收器系统,通过双数据速率传输降低能耗与延迟。
0.18µm CMOS, 1.8V, 8.5µW, -73dBm灵敏度, 902-928MHz频段
唤醒接收器低功耗低延迟双数据速率CMOS
▸采用1kbps和200kbps双数据速率传输唤醒包
▸利用位级占空比检测启动帧位(SFBs)
▸检测到SFB序列后停止占空比循环以降低延迟
Abstract
A new wake-up receiver is p roposed to reduce energy
consumption and latency through adoption of two diff erent data
rates for the transmission of wake-up packets. To reduce the en-
ergy consumption, the start frame bits (SFBs) of a wake-up packet
are transmitted at a low data rate of 1 kbps, an d a bit-level duty
cycle is employed for detection of SFBs. To reduce both energy con-
sumption and latency, duty cycling is halted upon detection of the
SFB sequence, and the rest of the wake-up pa cket