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JSSC 2012第11期Data Converters0.13μm CMOS

A 190- W zero-IF GFSK Demodulator With a 4-b Phase-Domain ADC Jens Masuch, Student Member , IEEE, and Manuel Delgado-Restituto ,S e n i o rM ember , IEEE

本文提出了一种基于相位域ADC的低功耗零中频GFSK解调器,适用于BLE标准。
190μW功耗, 0.14mm²面积, 74dB动态范围, 1Mbps数据速率
零中频GFSK解调器相位域ADC蓝牙低功耗电流域处理
采用相位域ADC直接量化信号相位
无电阻电流域相位旋转方案
集成可编程增益放大器和符号判决模块
Abstract
This paper presents a zero-IF Gaussian fre- quency-shift keying (GFSK) de modulator based on a phase-do- main analog-to-digital converter (Ph-ADC) which directly quantizes the phase information of the received complex baseband signal. The Ph-ADC linearly comb ines the in-phase and quadra- ture parts of the incoming signal, and the generated phase-shifted versions are fed to comparators t o detect the zero-crossings and build a 4-b digital representation of the signal phase. Seeking for a low-area and low-power consumption realization, our proposal employs a resistor-less scheme which performs phase rotations in current domain. Together with the Ph-ADC, the fully integrated GFSK demodulator also includes a channel- filtering programmable gain ampli fier and a symbol decision block. Alto- gether, the demodulator occupies 0.14 mm in a 0.13- mC M O S technology with a total power consumption of 190 Wf r o ma1 - V supply. For a data rate of 1 Mbps and 0.5 modulation depth, the GFSK demodulator requires an of 14.8 dB for a bit error rate of 0.1% considering a flicker noise corner of 150 kHz, obtains a dynamic range of 74 dB, and is abl e to tolerate carrier frequency offsets of 170 kHz. This performance safely complies with the requirements of the Bluetooth Low Energy (BLE) standard.