Subthreshold, V aractor-Driven CMOS Floating-Gate Current Memory Array With Less Than 150-ppm/ K

Abstract

Floating-gate (FG) transistors serve as attra ctive media for nonvolatile storage of analog parameters. However, conventional FG current memories when used for storing sub- threshold currents are sensitive to variations i nt e m p e r a t u r e which limit their applications to c ontrolled environments. In this paper, we propose a temperature-compensated high-density array of FG current memories that can be used for stor ing subthreshold currents ranging from picoamperes to nanoamperes. The core of the proposed architecture is a fe edback control technique that uses a varactor to adapt the FG capacita nce in a manner that the temperature-dependent factors are effectively canceled. As a result, the stored current is only a function of a reference current and the differential charge stored o nt h eF G .M e a s u r e dr e s u l t s from prototype arrays fabricated in a 0.5- mC M O Sp r o c e s s demonstrate a worst case temperature sensitivity of 150 ppm/ K and programmability down to a few p icoamperes. In this regard, we also present a novel method to precisely program currents on the proposed FG memory array by exploiting a linearizing property of the integrated va ractor.