A 2-Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60-GHz Short-Range

Abstract

This paper presents a fully integrated CMOS 60-GHz transceiver chipset for short-r ange and high-speed wireless communication. The target application of the short-range com- munication is less than 5-cm communication distance and more than 2-Gb/s throughput for file transfer. In order to achieve file transfer, physical (PHY) layers with error packet correction and media access control (MAC) layer with frame-exchanging function are implemented. The MAC is designed to have a high-ef ficiency feature due to short interval DATA/Acknowledgement (ACK) frame exchange. It is realized by fast transmitter (TX)/receiver (RX) switching. A bonding wire -based in-package antenna is adopted using a standard BGA package without any off-chip 60-GHz components. The proposed chipset is composed of two chips, an RF chip with in-pack age antenna, and a baseband chip including PHY and MAC layer. The fabricated chipset achieves 2.62-Gb/s PHY data rate, 2.07-Gb/s MAC throughput, and energy consumption of 651 pJ/bit in 3-cm distance.