A 2.4-GHz 20–40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS

Abstract

A digital outphasing transmitter i sp r e s e n t e df o r 2.4-GHz WiFi. The transmitter consists of two delay-based phase modulators and a 26-dBm integrated switching class-D power amplifier. The delay-based phase modulator delays incoming LO edges with a resolution of 1.4 ps (8 bit) required to meet WiFi requirements. A phase MUX architecture is proposed to implement switching between phases once every LO period (2.4 GHz) without generating detrimental glitches at the output. Due to its open-loop nature, the proposed phase modulator is capable of delivering wide OFDM bandwidth su pt o4 0M H z .T h ep a p e r analyzes the impact of impairments, e.g., delay mismatch within the delay cells and outphasing mis matches, as well as associated mitigation techniques. The tra nsmitter has been implemented in a 32-nm digital CMOS process and delivers an OFDM average power of 20 dBm with an overall system ef ficiency of 18.6% when transmitting 54-Mb/s 64QA M signal. The fully digital design is expected to further improve in power dissipation and chip-area with further CMOS scaling.