← 返回 JSSC 论文列表JSSC 2012第12期RF & Wireless32nmHigh-Speed LinkEqualizer
A 28-Gbs 4-Tap FFE15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technolog
本文介绍了一种32nm SOI CMOS技术下的28Gb/s收发器，适用于高损耗电通道的芯片间通信。
28 Gb/s, 693 mW/lane, 35 dB loss at half-baud frequency
收发器SOI CMOS均衡器芯片间通信高损耗通道
▸采用4抽头FFE和15抽头DFE的均衡技术
▸源串联终止驱动拓扑结构
▸电容耦合并行输入级和主动反馈的峰值放大器
Abstract
This paper presents a 28-Gb/s transceiver in 32-nm
SOI CMOS technology for chip-to-chip communications over
high-loss electrical channels such as backplanes. The equalization
needed for such applications is provided by a 4-tap baud-spaced
feed-forward equalizer (FFE) in t he transmitter and a two-stage
peaking ampli fier and 15-tap decision-feedback equalizer (DFE)
in the receiver. The transmitter employs a source-series termi-
nated (SST) driver topology which doubles the speed of existing
half-