An Optimized Driver for SiC JFET-Based Switches Enabling Converter Operation With More Than 99% Efficiency

Abstract

This paper presents the single channel galvanically isolated gate driver optimized for driving a normally-on silicon carbide junction field effect transistor (SiC JFET) also presented at ISSCC 2012 [1]. The idea of the chosen direct drive JFET concept is to switch power with a normally-on SiC JFET, using the high voltage breakdown capability of the SiC JFET and ensurin gas a f e normally-off behavior using a normally-off low voltage MOSFET in series. By controlling the transistor gates individually the JFET can be driven with minimum switching losses and good co ntrol. The driver makes the operation and handling of normally-on SiC JFETs as safe as normally-off switc hes, thereby simplifying the in- tegration of normally-on SiC JFETs into syste ms like switch mode power supplies. To transfer the signal from the controller to the driver over a needed galvanic isolation of 1700 V a two chip so- lution with a coreless transformer arrange di no n ep a c k a g ew a s chosen, using a 0.6 BiCMOS and a 0.8 BCD technology. Powering of the gate driver through bootstrapping has been made possible, due to the direct drive JFET concept and the further inte- gration of supervision and control circuitry and a negative voltage regulator that regulates the entire p-substrate of the driver chip. Tested together with the JFET in a buck converter efficiencies over 99% have been measured.