← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2012第12期Clocking & PLLs90nmVCOOp-Amp

Analog Filter Design Using Ring Oscillator Integrators Brian Drost Member IEEE

提出使用环形振荡器积分器设计高性能模拟滤波器,克服传统积分器增益受限问题。
90nm CMOS, 0.5V电源, 2.9mW功耗, 7MHz带宽, 61.4dB SNR, 67.6dB SFDR, 60.1dB THD
环形振荡器积分器模拟滤波器CMOS低电压设计工艺缩放
采用环形振荡器积分器(ROIs)替代传统OTA积分器
在低电源电压下实现无限DC增益
适应工艺缩放,提升性能稳定性
Abstract
Integrators are key building blocks in many analog signal processing circuits and systems. The DC gain of conven- tional opamp-RC or - integrators is severely limited by the gain of operational transconductance ampli fier (OTA) used to im- plement them. Process scaling reduces transistor output resistance, which further exacerbates this iss ue. We propose applying ring os- cillator integrators (ROIs) in the design of high order analog filters. ROIs implemented with simple CMOS inverters achieve in