← 返回 JSSC 论文列表JSSC 2013第1期Memory19nmFlash Memory
A1 9n m1 1 2 8m m 64 Gb Multi-Level Flash Memory With 400 Mbitsecpin 18 V Toggl
19nm CMOS工艺下64Gb MLC NAND闪存,采用单边全位线架构,实现高性能编程吞吐量。
64 Gb, 15 MB/s program throughput, 400 Mbit/sec/pin
64GbMLC NAND19nm CMOS单边全位线架构高速切换模式
▸单边全位线架构(方法创新):采用单侧全位线(ABL)架构优化了存储单元布局,减少了传统双侧位线架构的布线复杂度和面积开销,在19 nm CMOS工艺下实现了64 Gb的高密度存储,同时提升了信号传输效率。
▸位线偏置加速(电路创新):通过创新的位线偏置加速(BLBA)技术,动态调整位线偏置电压,显著提高了编程速度,实现了15 MB/s的高编程吞吐量,同时降低了功耗。
▸BC状态优先编程算法(系统创新):引入BC状态优先编程算法,优化了多级单元(MLC)的编程顺序,减少了编程干扰和错误率,提升了存储可靠性和整体性能。
▸高速切换模式接口(电路创新):实现了400 Mbit/sec/pin的高速切换模式接口,支持18 V工作电压,显著提升了数据传输速率,满足了高性能存储应用的需求。
Abstract
A 64 Gb MLC NAND flash memory in 19 nm CMOS
technology has been developed. By adopting one-sided all bit line
(ABL) architecture, the single cell array con figuration, bit line
bias acceleration (BLBA) and BC states first program algorithm,
the smallest 64 Gb die size in 2 bit/cell is achieved with high
performance of 15 MB/s program throughput. Program suspend
and erase suspend functions are introduced to improve the read
latency. High speed toggle mode i nterface of 400 Mbit/sec/pin at
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