JSSC 2013第1期Digital Circuits32nm

A 205 GV erticess 151 mW Lighting Accelerator for 3D Graphics V ertex and Pixel

一款用于3D图形顶点和像素着色的高性能照明加速器，采用32nm CMOS工艺，实现2.05 GVertices/s的吞吐量。

1.05 V, 32 nm CMOS, 2.05 GVertices/s, 354 W active leakage power, 2.22 GHz scalable performance

照明加速器3D图形顶点着色像素着色高性能计算

▸创新点1：单周期吞吐量照明加速器设计，通过并行计算环境光、漫反射和镜面反射光照，实现2.05 GVertices/s的高吞吐量，显著提升3D图形处理效率。

▸创新点2：采用32b对数与反对数单元实现高精度计算，将浮点运算转换为定点运算，同时保持仅0.56%的平均顶点光照误差，兼顾了计算精度与硬件效率。

▸创新点3：稀疏树固定点加法器与乘法器优化，通过截断部分积减少树结构，降低关键路径逻辑级数达47%，同时支持2.22 GHz的可扩展性能。

▸创新点4：创新的电源管理设计，在560 mV超低电压下实现56 GVertices/s/W的峰值能效，同时主动泄漏功率仅为354 μW，适用于高性能处理器和移动SoC。

Abstract

This paper describes a single-cycle throughput lighting accelerator fabricated in 1.05 V , 32 nm CMOS for on-die acceleration of 3D graphics vert ex and pixel shading in high-per- formance processors and mobile systems-on-chip. Log-domain parallel computation of ambient, diffuse, and specular lighting using high-accuracy 32b log and anti-log units that convert computation from ﬂoating-point (FP) to ﬁxed-point domain, 32b sparse-tree ﬁxed-point adders and a 32 32b signed ﬁxed-point multiplier wit