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Introduction to the Special Issue on the 2012 IEEE International Solid-State Cir
2012年ISSCC会议精选论文，涵盖低功耗高性能数字电路、存储器、传感器等技术方向。
65nm CMOS技术
低功耗高性能数字电路存储器传感器
▸创新点1：超低功耗处理器设计，采用65 nm CMOS技术，通过定制标准单元库和9T多阈值SRAM单元实现超低电压操作，显著降低功耗。
▸创新点2：自适应电源电压控制，通过动态调整处理器供电电压，优化能效比，适用于无线传感器节点等低功耗应用场景。
▸创新点3：9T多阈值SRAM单元，采用多阈值技术设计，提高存储单元在超低电压下的稳定性和可靠性，适用于超低功耗处理器。
▸创新点4：实时对象识别处理器，集成31个异构核心，支持HD视频流处理，实现30帧/秒的帧率和342 8-bit GOPS峰值性能，平均功耗仅为320 mW。
Abstract
ational Solid-State Circuits Conference
(ISSCC) is the foremost global forum for presenting
advances in solid-state circuits and systems-on-a-chip. Every
year since its first issue, the IEEE J OURNAL OF SOLID-STATE
CIRCUITS has highlighted some well-received papers from the
most recent ISSCC in special issu es. This special issue covers
the ISSCC conference held in San Francisco, CA, February
19–23, 2012. Session chairs an d co-chairs initially recom-
mended papers for publication, with final deci