SleepWalker: A 25-MHz 0.4-V Sub-mm 7- W/MHz Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless

Abstract

Integrated circuits for wireless sensor nodes (WSNs) targeting the Internet-of-Things (IoT) paradigm require ul- tralow-power consumption for en ergy-harvesting operation and low die ar ea for low-cost nodes. As the IoT calls for the deploy- ment of trillions of WSNs, minimizing the carbon footprint for WSN chip manufacturing further emerges as a third target in a design-for-the-environment (DfE) pe rspective. The SleepWalker microcontroller is a 65-nm ultralow-voltage SoC based on the MSP430 architecture capable of delivering increased speed per- formanc e sa t2 5M H zf o ro n l y7 W/MHz at 0.4 V. Its sub-mm die area with low external component requirement ensures a low carbon footprint for chip manufacturing. SleepWalker in- corporates an on-chip adaptive voltage scaling (A VS) system with DC/DC converter, clock generator, memories, sensor and communication interfaces, makin g it suited for WSN applications. An LP/GP process mix is fully explo ited for minimizing the energy per cycle, with power gating to keep stand-by power at 1.7 W. By incorporating a glitch-masking in struction cache, system power can be reduced by up to 52%. The A VS system ensures proper 25-MHz operation over process and temperature variations from 40 Ct o 85 C, with a peak ef ficiency of the DC/DC converter above 80%. Finally, a multi- clock tree reduces variability-in- duced clock skew by 3 to ensure robust timing closure down to 0.3 V.