An 80-dB DR, 7.2-MHz Bandwidth Single O p a m pB i q u a dB a s e dC T Modulator Dissipating 13.7-mW

Abstract

A novel low power compact loop filter using a single amplifier biquad (SAB) network is presented for continuous-time (CT) delta-sigma modulators. This new technique reduces power consumption and die area by minimizing the number of ac- tive elements and simplifying the modulator topology. The new SAB network has a transfer function (TF) zero, which implements a local feedforward (FF) path in system-level diagram. By having a local FF branch embedded in the SAB network, the FF branches to the summing block in the SAB based feedforward modulator topology is reduced to half the number of FF branches in the con- ventional topology. Consequently, the SAB based modulator uti- lizes a switch-capacitor (SC) adder replacing the commonly used CT adder and the sample & hold blocks in the conventional ar- chitecture. The SAB based loop filter with reduced FF branches simplifies the design and implementation of the high-order contin- uous-time modulator. The proposed loop filter is a general filter, which can be used for both high and low oversampling ra- tios (OSRs). A 4th-order low pass continuous-time modulator is designed and implemented in 130 nm process to con firm the ef- fectiveness of the proposed techniques. Within a 7.2 MHz signal bandwidth, the measured dynamic range and SFDR of this proto- type IC are 80 dB and 83.1 dB, respectively, and the total power consumption of 13.7 mW.