An Ultra-Low Power Asynchronous-Logic In-Situ Self-Adaptive System for Wireless Sensor Networks Tong Lin

Abstract

We propose a Sub-thresh old (Sub- ) Self-Adaptive Scaling (SSA VS) system for a Wireless Sensor Network with the objective of lowest possible power dissipation for the prevailing throughput and circuit con ditions, yet high robustness and with minimal overheads. The effort to achieve the lowest possible power operation is by means of adjusting to the minimum voltage (within 50 mV) for said co nditions. High robustness is achieved by adopting the Quasi-Delay-Insens itive (QDI) asynchronous-logic protocols where the circuits t herein are self-timed, and by the embodiment of our pr oposed Pre-Charged-Static-Logic (PCSL) design approach; when compared against competi ng approaches, the PCSL is most competitive in terms of energy/operation, delay and IC area. By exploiting the already existing request and acknowledge signals of the QDI protocols, the ensuing over- head of the SSA VS is very modest. The filter bank embodied in the SSA VS is s hown to be ultra-low power and highly ro- bust. When benchmarked against t he competing conventional Dynamic-Voltage-Frequency-Scaling (DVFS) synchronous-logic counterpart, no one system is particularly advantageous when the operating conditions are know n. However, when the competing DVFS system is designed for the worst-case condition, the pro- posed SSA VS system is somewhat more competitive, including uninterrupted operation while its self-adjusts to the varying conditions.