JSSC 2013第3期Memory

A High-Speed 72-ns Read-Write Random Access 4-Mb Embedded Resistive RAM ReRAM Ma

提出两种抗工艺变化的ReRAM读取方案，实现高速低功耗操作。

7.2 ns read-write random access time, 4-Mb ReRAM macro

ReRAM非易失性存储器读取速度位线偏置工艺变化

▸并行-串联参考单元（PSRC）方案

▸工艺-温度感知动态位线偏置（PTADB）方案

▸实现7.2纳秒读写随机访问时间

Abstract

ReRAM is a promising next-gene ration nonvolatile memory (NVM) with fast write speed and low-power operation. However, ReRAM faces two major challenges in read operations: 1) low read yield due to wide resistanc e distribution and 2) the re- quirement of accurate bitline (BL) bias voltage control to prevent read disturbance. This study proposes two process-variation-tol- erant schemes for current-mode read operation of ReRAM: par- allel-series reference-cell (PSRC) and process-temperature-aware