Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classi fication for Next Generation Multi-Bit/Cell NAND FLASH Y ong Sung Cho, Il Han Park, Sang Y ong Y oon, Nam Hee Lee, Sang Hyun Joo, Ki-Whan Song, Kihwan Choi, Student Member , IEEE, Jin-Man Han, Kye

Abstract

As device technology is scaling down, ’s of NAND flash cell show a wide distribution due to process variations such as random dopant fluctuation, etc. Since the extension of distri- bution is directly related to degradation of program performance of NAND flash, it is more challenging to meet the market require- ments for applications such as solid-state drivers (SSD). This paper presents a novel program scheme, called Adaptive Multi-pulse Pro- gram (AMP), for the scaled multi-bit/cell NAND flash devices. In the proposed program scheme memory cells are classi fied into sev- eral groups based on their own p rogram speeds. F-N tunneling characteristic of NAND cell array is considered in determining the level of program bias for each gro up. Adaptive program pulses are applied to the prede fined groups so that cells reach their target verify level at the same time, re gardless of the difference of their program speed. Our experimental results show that AMP achieves 20% improvement on program performance due to the reduction of the number of verify executions by 39% in 3-bit/cell architecture NAND flash memory of 21 nm CMOS technology.