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JSSC 2013第6期Clocking & PLLs65nm

Tunable N-Path Notch Filters for Blocker Suppression Modeling and V erification

本文研究了可调谐N路径陷波滤波器,用于阻塞抑制,通过时钟频率调谐实现高性能滤波。
陷波中心频率可调范围0.1至1.2 GHz,插入损耗1.4–2.8 dB,陷波频率抑制21–24 dB
N路径陷波滤波器阻塞抑制可调谐CMOS闭式方程
差分和单端N路径陷波滤波器的建模与分析
提供滤波特性和非理想性的闭式方程
实现65nm CMOS技术的八路径单端和差分陷波滤波器
Abstract
N-path switched- RC circuits can realize filters with very high linearity and compression point while they are tunable by a clock frequency. In this paper, both differential and single-ended N-path notch filters are modeled and analyzed. Closed-form equa- tions provide design equations for the main filtering characteris- tics and nonidealities such as: harmonic mixing, switch resistance, mismatch and phase imbalance, clock rise and fall times, noise, and insertion loss. Both an eigh t-path single-e