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JSSC 2013第7期Clocking & PLLs90nm CMOS

Highly Efficient Class-C CMOS VCOs, Including a Comparison With Class-B VCOs

本文提出两种采用动态偏置核心晶体管的Class-C CMOS VCO,优化振荡幅度并确保启动稳定性。
3.4-4.5 GHz调谐范围(28%),5.5mA@1.2V,相位噪声<-152dBc/Hz@20MHz偏移
Class-C VCO动态偏置相位噪声FoM优化CMOS振荡器
创新点1:动态偏置核心晶体管(电路创新) - 通过动态调整核心晶体管的偏置电压,优化了振荡器的起振稳定性和振幅,解决了传统Class-C VCO在起振和振幅之间的固有矛盾,显著提升了性能。
创新点2:突破Class-C拓扑最严苛的折衷(方法创新) - 提出了一种新型Class-C拓扑结构,在不牺牲起振鲁棒性的前提下最大化振荡幅度,打破了传统设计中起振与振幅之间的严重折衷关系。
创新点3:实现接近工艺极限的FoM(系统创新) - 通过优化设计和动态偏置技术,实现了191 dBc/Hz的优异FoM,接近90 nm CMOS工艺的理论极限,且在28%的调谐范围内FoM变化小于1 dB,表现出极高的稳定性。
创新点4:宽调谐范围与低相位噪声(性能创新) - 在3.4 GHz至4.5 GHz的宽调谐范围内(28%),相位噪声低于-152 dBc/Hz @20 MHz偏移,同时仅消耗5.5 mA电流(1.2 V供电),展现了高效的能耗比。
Abstract
This paper presents two class-C CMOS VCOs with a dynamic bias of the core transistors, which maximizes the oscilla- tion amplitude without compromising the robustness of the oscil- lation start-up, thereby breaking the most severe trade-off in the original class-C topology. An analysis of several different oscillators, starting with the common class-B architecture and arriving to the proposed class-C design, shows that the latter exhibits a figure-of-merit (FoM) that is closest to the ideal FoM allowed by the integration technology. The class-C VCOs have been implemented in a 90 nm CMOS process with a thick top metal l ayer. They are tunable between 3.4 GHz and 4.5 GHz, covering a tuning range of 28%. Drawing 5.5 mA from 1.2 V , the phase noise is lower than 152 dBc/Hz at a 20 MHz offset from a 4 GHz carrier. The resulting FoM is 191 dBc/Hz, and varies less than 1 dB across the tuning range.