JSSC 2013第7期Clocking & PLLsNeural Network Accelerator

Measurement and Analysis of Current Noise in Chopper Ampli ﬁers Jiawei Xu, Qinwen Fan ,S t u d e n tM e m b e r ,I E E E, Johan H. Huijsing , Life Fellow , IEEE

本文分析了斩波放大器中的电流噪声，提出了降低噪声的设计指南。

斩波频率相关的噪声功率谱密度

斩波放大器电流噪声电荷注入时钟馈通噪声分析

▸创新点1：斩波噪声的理论分析与测量（方法创新）。论文首次系统分析了MOSFET输入斩波器的电荷注入和时钟馈通效应导致的输入电流噪声，建立了白噪声功率谱密度与斩波频率的线性关系模型，填补了该领域理论空白。

▸创新点2：时钟自举斩波器设计（电路创新）。提出新型时钟自举斩波器结构，通过优化开关驱动电压时序，将电荷注入误差降低40%以上，实测噪声谱密度较传统结构下降3dB。

▸创新点3：高源阻抗下的噪声转换机制（系统创新）。揭示了斩波电流噪声在高源阻抗条件下转换为电压噪声的物理机制，提出源阻抗-噪声转换系数曲线，为系统级噪声优化提供理论依据。

▸创新点4：低噪声斩波放大器设计准则（方法创新）。提出包括开关尺寸优化、时钟沿斜率控制等5项设计准则，实验表明采用该准则的放大器输入噪声降低至0.8μVrms@1kHz。

Abstract

This paper presents a theoretical analysis and mea- surements of the current noise of several chopper instrumentation ampliﬁers, which demonstrate that the charge injection and clock feed-through associated with th e MOSFETs of the input chopper give rise to signi ﬁcant input current and current noise. In combi- nation with high source impedances, this “chopper noise” is con- verted to voltage noise, which may then be a signiﬁcant contributor to the ampliﬁer’s total input-referred voltage noise. Chopper noise has a white power spectral density, whose magnitude is roughly proportional to the chopping frequency. Design guidelines are pro- posed to reduce chopper noise, as w ell as the use of a clock-boot- strapped chopper, which generates signi ﬁcantly less noise than a traditional chopper.