← 返回 JSSC 论文列表JSSC 2013第9期RF & Wireless0.35μm SiGe BiCMOS与BCD工艺
High-Efficiency Silicon-Based Envelope-Tracking Power Ampli fier Design With Envelope Shaping for Broadband Wireless Applications Ruili Wu, Student Member , IEEE, Yen-Ting Liu , Student Member , IEEE
高效硅基包络跟踪功率放大器设计，适用于宽带无线应用。
2W饱和输出功率，65%以上PAE，0.7-1.0 GHz带宽
包络跟踪功率放大器SiGe高效宽带无线LTE
▸创新点1：采用伪差分功率放大器设计，通过双SiGe功率单元集成实现高线性度和抗干扰能力，在0.7-1.0 GHz带宽内实现65%以上的功率附加效率（PAE），属于电路拓扑创新
▸创新点2：集成SiGe功率单元与TSV技术，利用0.35μm SiGe BiCMOS工艺的TSV实现三维互连，降低寄生参数并提升热管理能力，支持2W饱和输出功率，属于工艺集成创新
▸创新点3：高效CMOS包络调制器IC设计，采用0.35μm BCD工艺实现单片集成，通过动态包络整形（包括DC偏移、包络缩放等技术）使ET-PA系统在LTE 16QAM信号下达到42.3%平均复合PAE，属于系统级能效优化创新
▸创新点4：无预失真条件下满足LTE严格线性指标（如频谱辐射模板），通过包络削峰和回退衰减等创新方法实现28dBm线性输出，属于线性化技术突破
Abstract
This paper presents a highly ef ficient silicon-based envelope-tracking power ampli fier (ET-PA) for broadband wire- less applications. A pseudo -differential power ampli fier (PA) is designed using two integrated SiGe power cells fabricated in a 0.35- m SiGe BiCMOS technology with through-silicon-via (TSV). In the continuous-wave (CW) measurement, the PA achieves a saturated output power of around 2 W with power-added efficiency (PAE) above 65% across the bandwidt ho f 0.7–1.0 GHz. To optimize the ET-PA system performance, several envelope shaping methods such as dc shifting, envelope scaling, envelope clipping, and envelope attenuation at ba ck-off have been investigated carefully. A highly ef ficient monolithic CMOS envelope modulator (EM) integrated circuit (IC) is designed in a 0.35- m bipolar-CMOS-DMOS (BCD) process to mat ew i t ho u r SiGe PA. With the LTE 16 QAM 5/10/20-MHz input signals, our ET-PA system achieves around 28 dBm linear ,p a s s i n gt h e stringent LTE linearity specs such as the spec trum emission mask with an average composite system PAE of 42.3%/41.1%/40.2%, respectively. No predistortion is applied in this work.