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JSSC 2013第9期RF & Wireless0.13μm CMOSNeural Network Accelerator

Low-Power, Low-Cost CMOS Direct-Conversion Receiver Front-End for

一款宽带CMOS直接转换接收器前端,具有低功耗和低成本特性,适用于多标准应用。
13mW功耗,22.4dB转换增益,8.3dB噪声系数,1.5dBm线性度,1.4-5.2GHz工作频率
宽带接收器直接转换CMOS低功耗多标准
采用宽带共栅极低噪声跨导放大器(LNTA)与双反馈结构
电流模式被动混频器与低输入阻抗跨阻放大器(TIA)的组合
LNTA负载阻抗提升技术以减少TIA引起的噪声放大
Abstract
A broadband CMOS direct-conversion receiver with on-chip frequency divider has been integrated in a 0.13- m CMOS process. The key feature of the proposed receiver front-end is a single low-noise transconductance ampli fier (LNTA) driving a current-mode passive mixer termi nated by a low-input-impedance transimpedance amplifier (TIA). The receiver chain has improved robustness to out-of-band interference and ou tstanding linearity. We employ a broadband common-gate (CG) LNTA with dual feed- back to improve both gain and noise figure (NF) without breaking the fixed relationship between input impedan ce, transconductance gain, and load impedance. A LNTA load impedance boosting technique suppresses noise-ampli fication due to TIA, commonly found in passive mixers. The core circ uit (RF and baseband signal p a t h )c o n s u m e so n l y1 3m W ,a n dt h eprototype receiver achieves 22.4-dB conversion gain, 8.3 dB NF, and 1.5 dBm from 1.4 to 5.2 GHz. Maximum convers ion gain of 24.3 dB and minimum NF of 6.5 dB are achieved at 1.4 and 2 GHz, respectively. T h ec h i pa c t i v ea r e ai s1 . 1m m with the entire RF signal path operated from a 1.2-V supply. The LO portion is biased from a 1.5-V supply.