← 返回 JSSC 论文列表JSSC 2013第10期Memory44nmDRAM
A Process-V ariation-Tolerant On-Chip CMOS Thermometer for Auto Temperature Comp
提出一种用于DRAM温度自适应刷新的片上CMOS温度计，显著降低自刷新电流。
3.2 mV/°C灵敏度，0.36 μW功耗，1.1V供电
CMOS温度计DRAM自适应刷新低功耗片上集成
▸创新点1：采用新型温度传感器设计，通过优化CMOS工艺下的温度敏感元件结构，实现了3.2 mV/°C的高灵敏度（0-110°C范围），属于电路创新。
▸创新点2：实现1.94°C分辨率，该性能由电阻阶梯的6.2 mV步进限制而非传感器自身设计限制，表明电路架构具备潜在更高分辨率能力，属于系统级优化创新。
▸创新点3：支持单点校准技术，利用传感器优异的线性特性（误差±1.42°C至2.66°C），显著降低量产测试成本，属于方法创新。
▸创新点4：集成于44nm LPDDR2芯片并实现0.36μW超低功耗（1.1V供电），面积仅0.001725 mm²，在0°C时使IDD6电流降低50%，属于系统级能效创新。
Abstract
Smaller transistors mean that capacitors are charged
less uniformly, which increases the self-refresh current in the
DRAMs used in mobile devices. Adaptive self-refresh using an
on-chip thermometer can solve this problem. We propose an
on-chip CMOS thermometer speci fically designed for controlling
the refresh period of a DRAM. This thermometer includes a novel
temperature sensor which has been implemented and integrated
into an LPDDR2 chip. The LPDDR2 chip is fabricated in a
44-nm DRAM process.