JSSC 2013第10期Power Management0.18µm

High Area-Ef ﬁcient DC-DC Converter With High Reliability Using Time-Mode Miller Compensation (TMMC) Sung-Wan Hong, Student Member , IEEE , Tae-Hwang Kong , Student Member , IEEE , Sang-Hui Park, Student Member , IEEE, Changbyung Park, Seungchul Jung ,S t u d e n tM e m b e r ,I E E E

提出一种新型时间模式米勒补偿方案，用于高面积效率和高可靠性的DC-DC转换器。

最大功率效率90.6%，负载电流220mA，开关频率1.15MHz，输入电压3.3V，输出电压2V

DC-DC转换器时间模式米勒补偿高面积效率高可靠性片上集成

▸创新点1：时间模式米勒补偿（TMMC）方案是一种方法创新，通过时间模式控制替代传统模拟补偿，显著降低补偿组件需求（仅需1pF电容和80kΩ电阻），同时提升系统稳定性，对工艺变化不敏感。

▸创新点2：片上补偿组件集成属于电路创新，将补偿网络完全集成在芯片内部，节省了外部元件面积，核心面积仅0.12mm²（采用0.18µm工艺），达到与50nm以下工艺数字DC-DC转换器相当的尺寸。

▸创新点3：高可靠性设计是系统创新，TMMC方案在3.3V输入/2V输出条件下实现90.6%的峰值效率（负载电流220mA，开关频率1.15MHz），兼具高效率与小面积特性。

▸创新点4：工艺鲁棒性提升为工艺创新，通过时间域信号处理降低对CMOS工艺参数波动的依赖性，实测表明补偿网络性能在工艺角变化下保持稳定。

Abstract

This paper presents a novel on-chip compensa- tion scheme, the Time-Mode Miller Compensation (TMMC), for DC-DC converter in which the comp ensation components are inte- grated on-chip. Using this proposed scheme, the DC-DC converter is stably compensated and insens itive to process variations, with signiﬁcantly small compensatio n components (1 pF and 80 k Ω in this work) consuming very small silicon area owing to the characteristic of the TMMC. The s mall compensation components make the chip size small, with 0.12 mm² of core area (w/o power transistors) using 0.18 µm I/O process. This core size is as small as that of the digital DC-DC convert ers implemented with less than sub-50 nm process. The measurement result shows that the maximum power ef ﬁ- ciency of 90.6% is obtained at the load current of 220 mA with the switching frequency of 1.15 MHz when the input and the output voltages are 3.3 V and 2 V , respectively.