← 返回 JSSC 论文列表JSSC 2013第10期Data Converters0.45µm InP HBT + 0.18µm CMOSDAC
InP HBTSi CMOS-Based 13-b 133-Gsps Digital-to-Analog Converter With 70-dB SFDR
采用InP HBT与CMOS异质集成技术的13位1.33Gsps DAC,实现70dB SFDR
13位分辨率, 1.33Gsps采样率, >70dB SFDR, 500MHz带宽
数模转换器异质集成磷化铟高速转换线性度
▸InP HBT与0.18µm CMOS异质集成技术
▸无校准电路实现11位直流线性度
▸超高线性度归零(RZ)模拟输出消毛刺开关
Abstract
A prototype 13-b 1.33-Gsps digital-to-analog con-
verter (DAC) implemented in a uni que heterogeneous integration
process (combining 0.45-µm InP HBT with 0.18-µm CMOS) is
presented. Measured performance of greater than 70 dB SFDR
is achieved across a 500-MHz bandwidth centered at 1 GHz
(second Nyquist band). Heterogene ous integration enables each
circuit element to be implemente d in the transistor technology
best suited to the circuit functi on. Low dc power is achieved by
implementing the dig