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JSSC 2013第11期Memory40nmDRAM

A 64-fJConv-Step Continuous-Time Modulator in 40-nm CMOS Using Asynchronous SAR

40纳米CMOS工艺下采用异步SAR的64-fJ/转换步长连续时间调制器
65 MHz采样频率, 83.4 dB动态范围, 1.91 mW功耗, 1.2V电源
连续时间调制器异步SAR数字截断WCDMA/GSM/EDGECMOS
基于异步SAR的量化器降低面积和功耗
数字截断技术优化系统设计
交流耦合推挽级提高高频驱动能力
Abstract
A third-order single-loop continuous-time sigma- delta modulator (CTSDM) with 6-bit asynchronous successive approximation register (ASAR) quantizer and digital trun- cator for WCDMA/GSM/EDGE cellular systems is presented. The proposed ASAR-based quantizer reduces the area and power of the modulator dramatically by ut ilizing the digital truncation technique. By using the 6-bit ASAR quantizer, the sampling frequency is lowered, which reduces the design efforts not only in system level but also in