A Self-Authenticating Chip Architecture Using an Intrinsic Fingerprint of Embedd

Abstract

An architecture for enabling self-authenticating chips uses 4 Kb electrically programmable fuses (eFUSE) to store bit strings representing encrypted intrinsic fingerprints obtained by offset-superimposing six out of one thousand 4 Kb domains ran- domly chosen in 4 Mb embedded DRAM. Authentication is accom- plished by regenerating various encrypted intrinsic fingerprints, which are then compared with the bit strings in the eFUSE. Monte Carlo simulations demonstrate that, targeting an average of 32