← 返回 JSSC 论文列表JSSC 2013第11期Power Management0.13µmBuck Converter
An 84.7% Ef ficiency 100-MHz Package Bondwire-Based Fully Integrated Buck Converter With Precise DCM Operation and Enhanced Light-Load Efficiency Cheng Huang, Student Member , IEEE, and Philip K. T. Mok , Senior Member , IEEE
一种利用标准封装键合线作为功率电感的高效100MHz全集成降压转换器。
0.13µm CMOS, 1.2V→0.9V, 100MHz, 84.7%峰值效率
全集成降压转换器键合线电感DCM校准高频设计效率优化
▸使用标准封装键合线作为功率电感,降低成本与传导损耗
▸采用DCM校准环路放宽键合线电感精度要求,解决全集成转换器精确DCM操作问题
▸优化功率晶体管、输入去耦电容和控制器设计,实现高效高频转换
Abstract
A 100-MHz PWM fully integrated buck converter utilizing standard package bondwire as power inductor with en- hanced light-load ef ficiency which occupies 2.25 mm² in 0.13-µm CMOS is presented. Standard package bondwire instead of on-chip spiral metal or special s piral bondwire is implemented as power inductor to minimize the cost and the conduction loss of an integrated inductor. The accu racy requirement of bondwire inductance is relaxed by an extra di scontinuous-conduction-mode (DCM) calibration loop, which solves the precise DCM op eration issue of fully integrated conver ters and eliminates the reverse current-related loss, thus enab ling the use of standard package bondwire inductor with various packaging technique s. Optimiza- tions of the power transistors, the input decoupling capacitor (C ), and the controller are also presented to achieve an ef ficient and robust high-frequency design. With all three major power losses, conduction loss, switching loss, and reverse current related loss, optimized or eliminated, the ef ficiency is signi ficantly improved. An ef ficiency of 74.8% is maintained at 10 mA, and a peak ef- ficiency of 84.7% is measured at nominal operating conditions with a voltage conversion of 1.2 to 0.9 V. Converters with various bondwire inductances from 3 to 8.5 nH are m easured to verify the reliability and compatibility of different packaging techniques.