A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced

Abstract

High-speed signaling over h igh density interconnect on organic package substrates or silicon interposers offers an attractive solution to the off-chip bandwidth limitation problem f a c e di nm o d e r nd i g i t a ls y s t e m s .I nt h i sp a p e r ,w ed e s c r i b eas i g - naling system co-designed with the interconnect to take advantage of the characteristics of this environment to enable a high-speed, low area, and low-power die to die link. Ground-Referenced Sig- naling (GRS) is a single-ended signaling system that eliminates the major problems traditionally asso ciated with single-ended design by using the ground plane as the reference and signaling above and below ground. This design employs a novel charge pump driver that additionally eliminates the issue of simultaneous switching noise with data independent current consumption. Silicon mea- surements from a test chip implementing two 16-lane links, with forwarded clocks, in a standard 28 nm process demonstrate 20 Gb/s operation at 0.54 pJ/bit over 4.5 mm organic substrate channels at a nominal 0.9 V power supply voltage. Timing margins at the receiver are 0.3 UI at a BER of 10 .W ee s t i m a t e BER 10 at the eye center.