40-nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macros for Automotive With 160-MHz Random Access for Code and Endurance Over 10 M Cycles for Data at the Junction Temperature of 170 C Takashi Kono, Takashi Ito, Tamaki Tsuruda, Takay uki Nishiyama, Tsutomu Nagasawa, Tomoya Ogawa, Y oshiyuki Kawashima

Abstract

First-ever 40-nm embe dded split-gate MONOS (SG-MONOS) flash macros for automotive micro-controller unit (MCU) have been successfully developed. A SG-MONOS cell realizes high performance with low power consumption and intrinsically high data reliabilit y thanks to the combination of split-gate and charge-trapping structure. In addition, newly developed circuit techniques gr eatly enhance the advantages of SG-MONOS cells and enable fast and reliable operations even at the junction temperature (Tj) of 170 C with small peripheral circuit area; 1) a sense ampli fier with digital offset cancellation (SA-DOC) provides fast read operation over 160 MHz; 2) adapt- able program current control sc heme (APCCS) and intelligent erase scheme (IES) signi ficantly decrease the program and erase time, which also result s in improving the memor y cells’ reliability; and, 3) 3-D stacked unit capacitors achieve area-ef ficient charge pump. Two types of embedded flash (eFlash) macros with these technologies, code m a c r oo f2M Ba n dd a t am a c r oo f6 4K B , were fabricated in a 40-nm eFlash process. The code macro demonstrates the capability of 160-MHz random read operation at 170 C, reaching 5.1 G B/s read throughput by simulta- neous 256 bits read-out from two code macros. The data macro achieves the program/erase endurance over 10 million cycles at 170 Cw i t h o u ta n ys oftware-assisted techniques.