An LDPC Decoder With Time-Domain Analog and Digital Mixed-Signal Processing

Abstract

Time-domain analog and digital mixed-signal pro- cessing (TD-AMS) is presented. Analog computation is more energy- and area-ef ficient at the cost of its limited accuracy, whereas digital computation is more versatile and derives greater benefits from technology scaling. Besides, design automation tools for digital circuits are much more sophisticated than those for analog circuits. TD-AMS exploits both advantages, and is a solution better suited to impleme nting a system on chip including functions for which high computa tional accuracy is not required, such as error correction, image processing, and machine learning. As an example, a low-density parity-check (LDPC) code decoder with the technique is implemented in 65 nm CMOS and achieves the best reported ef ficiencies of 10.4 pJ/bit and 6.1 Gbps/mm².