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Highlights of the ISSCC 2013 Processors and High Performance Digital Sessions I
2013年ISSCC会议精选论文，涵盖处理器与高性能数字电路的最新进展
5.5 GHz, 2.75 B晶体管, 6 CPU核心, 2 MB L2缓存, 48 MB eDRAM L3缓存, 192 MB eDRAM L4缓存
处理器高性能数字电路eDRAM缓存全数字PLLISSCC
▸5.5 GHz处理器芯片设计
▸6 CPU核心与2 MB专用L2缓存
▸192 MB eDRAM L4缓存技术
▸28 nm和32 nm工艺节点应用
▸东京理工学院的创新型全数字PLL
Abstract
Circuits Conference
(ISSCC) is the foremost global forum for presenting
advances in solid-state circuits and systems-on-a-chip. Every
year since its first issue, the IEEE J OURNAL OF SOLID-STATE
CIRCUITS has highlighted some well-received papers from the
most recent ISSCC in special issu es. This special issue covers
the ISSCC conference held in San Francisco, CA, USA, on
February 17–21, 2013. Session ch airs and co-chairs initially
recommended papers for publication, with final decision for
incl