A 25-Gb/s 2.2-W 65-nm CMOS Optical Transceiver Using a Power-Supply-V ariation-Tolerant Analog Front End and Data-Format Conversion

Abstract

A one-chip optical transc eiver for board-to-board transmission was developed by integrating an ana log frontend (FE) with a data-format-conversion (DFC) block in 65-nm CMOS process technology. It was exper imentally demonstrated that this transceiver can convert 10x 6.25-Gb/s ele ctrical signals to 4x 25-Gb/s optical signals with 25% redundancy that improves resilience against possible laser diode (LD) failure. To alleviate degradation of the optical link due to po wer-supply variations, a power-supply-noise-tolerant 25- Gb/s analog FE (consisting of a TIA with a noise canceller and a fully differential LD driver) is proposed. The noise canceller can keep the power-supply variation below 0.2 mV at frequencies down to 1 MHz, and the fully differ- ential LD driver can keep power-supply current variation below 0.64 mApp/ch, despite a large modul ation current of 20 mApp. As for the transmission performance of the transceiver, eye diagrams experimentally con firmed 25-Gb/s and 6.25-Gb/s data-trans- mission rates. A 25-Gb/s opti cal-link test on the transceiver demonstrated error-free opera tion at –6.1-dBm OMA. Moreover, an image-transfer test on the trans ceiver operating at a data rate of 20 Gb/s through a 100-m mul ti-mode fiber was demonstrated. Total power consumption of the transceiver (including optics) was 2.2 W at full-channel operation.