A 57.9-to-68.3 GHz 24.6 mW Frequency Synthesizer With In-Phase Injection-Coupled QVCO in 65 nm CMOS Technology

Abstract

Af u l l yi n t egrated 60 GHz frequency synthesizer with an in-phase injection-coupled quadrature voltage-controlled oscillator (IPIC-QVCO) is propo sed. Through a particular sym- metrical coupling network formed by diode-connected transistors, the in-phase coupling is realiz ed in the IPIC-QVCO, which re- duces both phase noise and phase error. A compact inductor-less divider chain is designed to reduce power consumption. A self-cor- recting low spur charge pump is employed to reduce reference spur. A standalone 60 GHz IPIC-QVCO and a fully integrated PLL are imple mented in standard 65 nm low power CMOS technology. The measurement results show that the QVCO covers a frequency range from 57.88 to 68.33 GHz while consuming 11.4 mW pow er from a 1.2 V supply. The phase noise of the QVCO is –92 ~ –95 dBc/Hz at 1 MHz offset. The FOM and FOM T of the QVCO are –178.1 ~ –179.7 and –182.5 ~ –184.1 dBc/Hz respectively. The tuning range of the f requency synthesizer is from 57.9 to 68.3 GHz, and the power consumption is 24.6 mW. The phase noise of the frequency sy nthesizer is –89.8 ~ –91.5 dBc/Hz at 1 MH z offset across the frequency band.