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JSSC 2014第4期Memory40nm

A 1.59 Gpixel/s Motion Estimation Processor With 211 to +211 Search Range for UHDTV

一款针对UHDTV的159 Gpixels/s运动估计处理器,支持211×211搜索范围,显著提升编码效率。
40nm CMOS, 210MHz, 622mW, 1.59 Gpixel/s
运动估计UHDTVH.264/AVC视频编码低功耗
算法与架构协同优化:通过算法和硬件架构的深度协同设计,实现了高达1.59 Gpixel/s的吞吐量,比之前的设计快7.5倍以上,显著提升了运动估计的处理效率。
最大搜索范围211×106:支持水平和垂直方向的大范围运动估计,适应UHDTV的高动态视频内容,显著提升了视频编码的质量和适应性。
DRAM带宽需求降低68%:通过优化的数据访问策略和内存管理,大幅降低了DRAM带宽需求,减少了系统功耗和成本,提升了整体能效。
能效提升23%:在40 nm CMOS工艺下,核心功耗仅为622 mW,运行频率达210 MHz,相比之前设计能效提升至少23%,适用于高分辨率视频处理。
Abstract
3840 2160 and 7680 4320 UHDTV formats deliver remarkably enhanced visual experience relative to high definition but in the meanwhile involve huge complexity and memory bandwidth requirements in video encoding. Especially, enlarged motion distances of UHDTV lead to additional dif ficulties in the implementation of motion estimation, which is originally the most critical bottleneck of an encoder. This paper presents a motion estimation processor design for H.264/A VC. A test chip is implemented in 40 nm CMOS. With algorithm and architecture co-optimization, the processor d elivers a maximum throughput of 1.59 Gpixel/s for 7680 4320 48 fps video, at least 7.5 times faster than previous designs. The corresponding core power d issipation is 622 mW at 210 MHz, with energy ef ficiency improved by at least 23%. The chip’s DRAM bandwidth requirement is also 68% lower than previous chips. With a maximum search ran ge of 211 (horizontal) by 106 (vertical) around a predictive search center, the proposed motion estimation processor well accommodates the high motion of UHDTV.