A 12 pJ/Pixel Analog-to-Information Converter Based 816 × 640 Pixel CMOS Image

Abstract

Analog-to-information converters (AICs) take ad- vantage of the limited informatio n bandwidth in high-frequency signals to improve the energy ef ficiency of front-end data con- verters. High-resolution image se nsors often convey limited infor- mation due to the spatial redundancy between neighboring pixels. This paper proposes a mixed-signal AIC which compresses each nonoverlapping 4 × 4 pixel block in a 816 × 640 pixel prototype active-pixel sensor (APS) imager. It combines an energy-ef ficient charge-pump bit-image proc essor (BIP) with an area-ef ficient successive-approximation-register-single-slope (SAR-SS) hybrid analog-to-digital converter (ADC) via a charge-transfer-ampli fier (CTA). The AIC is fully dynamic and consumes no static power. The ADC’s capacitor array doubles as a computational device for parts of the compression algorithm which reduces its sampling rate by a factor of four. The compressed data contains direct edge information and can be decoded by a very simple receiver. The fabricated prototype consume s1 2p Jp e rp i x e la t1 1 1f p si nt h e image compression mode and 48 pJ per pixel at 28.7 fps in raw data mode (9 b per pixel) under the same clock rate. To the best of our knowledge, this is the most energy-ef ficient compressive CMOS image sensor ever reported in the literature, thanks to the proposed AIC.