Absolute V alue, 1% Linear and Lossless Current-Sensing Circuit for the Step-Down DC-DC Converters With Integrated Power Stage

Abstract

A circuit allowing to accurately measure the average output current of the step-down DC-DC converter operating in PWM mode is presented. It relies on the measurement of the av- erage voltage drop across the PMOS-NMOS or dual-NMOS power stage. The average voltage drop is measured by a simple RC filter, as a difference between the power-stage average output voltage and the average output voltage of an auxiliary “ideal” power stage. Obtained voltage drop is applied to an element labeled as “com- posite load”. This approach allows to remove the dominant er- rors originating from the use of a standard sense-FET circuit. Ob- tained output current image exhibits very low linearity error <1% in 10 mA to 2.1 A range, and high ±4% accuracy of the conver- sion gain over supply voltage, tempe rature and statistical chip-by- chip variations. The performances of integrated current sensor are demonstrated by measurements on 3.2 MHz step down DC-DC converter integrated in 0.5 µm CMOS process.