JSSC 2014第5期RF & Wireless65nm CMOSPLL

MAY 2014 VOLUME 49 NUMBER 5 IJSCBC (ISSN 0018-9200) SPECIAL SECTION ON THE IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM Introduction to the Spec i a lS e c t i o no nt h eI E E ER a d i oF r e q u e n c yI ntegrated Circuits (RFIC) Symposium . . .. . . W. Khalil 1079

IEEE JSSC 2014年5月刊包含多篇关于射频集成电路和无线通信技术的论文。

56.4-to-63.4 GHz, 0.5-to-3 GHz, 10米范围

射频集成电路锁相环软件定义无线电CMOS雷达无线通信

▸56.4-to-63.4 GHz多速率全数字分数N锁相环

▸0.5-to-3 GHz软件定义无线电接收器

▸厘米级分辨率、10米范围的CMOS脉冲雷达

Abstract

F r e q u e n c yI ntegrated Circuits (RFIC) Symposium . . .. . . W. Khalil 1079 A 56.4-to-63.4 GHz Mult i-Rate All-Digital Fractional-N PLL for FMC W R a da r A p pl i c a ti o ns in 6 5 n m C MO S ......... ........................................................................................ W . W u, R. B. St a s z e w s k i , a n d J . R . L on g 1081 A 0.5-to-3 GHz Software-De ﬁned Radio Receiver Using Discrete-Time RF Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . .