Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS Cheng Li, Student Member , IEEE,R u i B a i, Student Member , IEEE,A y m a n S h afik, Student Member , IEEE, Ehsan Zhian Tabasy , Student Member , IEEE, Binhao Wang, Geng Tan g, Student Member , IEEE, Chao Ma

Abstract

Photonic interconnects are a promising technology to meet the bandwidth demands of next-generatio n high-perfor- mance computing systems. This paper presents silicon photonic transceiver circuits for a microring resonator-based optical interconnect architec ture in a 1 V standard 65 nm CMOS tech- nology. The transmitter circuit s incorporate high-swing ( and drivers with nonlinear pre-emphasis and automatic bias-based tuning for resonance wavel ength stabilization. An optical forwarded-clock adaptive inverter-based transimpedance amplifier (TIA) receiver trades off power for varying link budgets by employing an on-die eye monitor and scaling the TIA supply for the required sensitivity. At 5 Gb/s operation, the transmitter achieves 12.7 dB extinction ratio with 4.04 mW power consump- tion, excluding laser power, when driving wire-bonded modulators designed in a 130 nm SOI process, while a 0.28 nm tuning range is obtained at 6.8 W/GHz ef ficiency with the bias-based tuning s c h e m ei m p l e m e n t e dw i t ht h e transmitter. When tested with a wire-bonded 150 fF p-i-n photodetector, the receiver achieves 9 dBm sensitivity at a and consumes 2.2 mW at 8 Gb/s. Testing wit h an on-die test structure emulating a low-capacitance waveguide photodetector yields 17 A sensi- tivity at 10 Gb/s and more than 40% power reduction with higher input current levels.