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A 40 nm Fully Integrated 82 mW Stereo Headphone Module for Mobile Applications Khaled Abdelfattah, Sherif Galal, Iu ri Mehr, Alex Jianzhong Chen, Chengyu e Y u, Maurice Tjie, Ahmet Tekin
40nm CMOS工艺下设计的82mW全集成立体声耳机模块，支持直接电池连接。
40nm CMOS, 3.1-4.5V, 100dB动态范围, 84dB THD+N, 0.675mm²面积
全集成立体声耳机模块SoC电池连接音频质量
▸创新点1：集成于SoC降低平台成本（系统创新）。通过将耳机模块与基带功能集成在同一SoC上，显著减少了外部组件需求，降低了整体平台成本。
▸创新点2：直接电池连接保证设备可靠性（电路创新）。采用直接电池连接技术，支持3.1至4.5V电池范围，并通过多种技术确保设备在各种条件下的安全运行。
▸创新点3：面积优化技术降低芯片成本（方法创新）。通过面积优化技术，将模块面积控制在0.675 mm²，有效降低了芯片制造成本。
▸创新点4：高性能音频质量（电路创新）。模块实现了100 dB的动态范围，84 dB的THD+N在10 mW输出功率下，以及160 Vp的pop-click噪声水平，确保了高质量的音频输出。
Abstract
An 82 mW fully integrated stereo ground-referenced headphone module is designed in 40 nm CMOS. Lo wer platform cost is enabled by integrating the headphone module on the same SoC as the baseband functions. Main taining device reliability with direct battery hook-up and providing large output swing are major challenges for this work, and several techniques were employed to guarantee safe operation for all of the devices under various con- ditions. Area reduction techniqu es were utilized to reduce the die cost and achieve lower platform cost. The module supports direct battery hookup with a battery range from 3.1 to 4.5 V and achieves a minimum low frequency, i.e., 2 17 Hz, PSRR of 110 dB at the lowest battery voltage. Audio quality is preserved by achieving a dynamic range of 100 dB, THD+N of 84 dB at 10 mW output power, and 160 Vp o p - a n d -click noise level during power-up and power-down. The module occupies an area of 0.675 mm on the SoC.