A Low-Power Low-Cost 24 GHz RFID Tag With a C-Flash Based Embedded Memory Hadar Dagan, Aviv S hapira

Abstract

The key factor in widespread adoption of Radio Fre- quency Identi fication (RFID) technology is tag cost minimization. This paper presents the first low-cost, ultra-low power, passive RFID tag, fully integrated on a single substrate in a standard CMOS process. The system combines a 24 GHz, d ual on-chip an- tenna, RF front-end, and a C-Flash based, rewritable, non-volatile memory module to achieve full on-chip system integration. The complete system was designed and fabrica ted in the TowerJazz 0.18 µm CMOS technology without any additional mask adders. By embedding the RF, memory, an d digital components together upon a single substrate in a standard d igital process, the low-cost aspirations of the “5-cent RFID tag” become feasible. Design considerations, analysis, circuit implementations, and measure- ment results are presented. The entire system was fabricated on a 3.6 mm × 1.6 mm (6.9 mm 2) die with the integrated antennas comprising 82% of the silicon area. The total read power was measured to be 13.2 µW, which i ss u fficiently supplied by the on-chip energy harvesting unit.